Field interpolation method determination device

ABSTRACT

Correlation of videos between fields is determined between a difference between an input interlaced signal and a signal that is delayed by one field with respect to the input interlaced signal. Correlation among N-1 sequential fields is compared with a predetermined pattern to determine whether the input interlaced signal is unquestionably a telecine-converted signal, whether it is unquestionably not a telecine-converted signal, or whether it cannot be said to be unquestionably a telecine-converted signal. If a determination of being unquestionably a telecine-converted signal is continued for a predetermined number or more of fields, an instruction signal, which instructs to perform inter-field interpolation on the input interlaced signal, is outputted.

TECHNICAL FIELD

The present invention relates to a field interpolation methoddetermination device for determining whether to perform either aninter-field interpolation method or an intra-field interpolation methodto combine fields of an inputted interlaced signal into frames andthereby to provide conversion to a progressive signal.

BACKGROUND ART

Interlaced signals to be converted into progressive signals areclassified into ordinary signals for images scanned by interlacedscanning and interlaced signals converted from progressive signals. Atypical example of the latter is a telecine-converted signal.

In a 2-2 pulldown method, which is a telecine conversion method, thetelecine-converted signal is generated as follows. Firstly, frames of a24 frame-per-second movie film are sequentially scanned to generate a 24frame-per-second progressive signal. Then, each frame (parent frame) ofthe progressive signal is converted into an odd field of an interlacedsignal and an even field following immediately thereafter.

For example, the first frame of a movie film (a first parent frame ofthe progressive signal) is converted into first and second fields, whilethe second frame of the movie film (a second parent frame of theprogressive signal) is converted into third and fourth fields.

Thus, visual images in the first and second fields converted from thesame parent frame are similar to each other, and therefore there is onlya small difference between the visual images. As for the second andthird fields converted from different parent frames, an inter-fieldvisual difference reflects a difference between the parent frames, andtherefore is large as compared to the former case. That is, a differencebetween adjacent fields varies alternately between large and small amongthe fields in accordance with a parent frame-to-field relationship.

Such a characteristic of the telecine-converted signal also holds for a60 field-per-second interlaced signal obtained by 2-2pulldown-converting a progressive signal captured by a 30P video camerafor generating a 30 frame-per-second progressive video signal.

Also, in a 2-3 pulldown method which is used for telecine conversion toan NTSC (60 field-per-second) interlaced signal, one frame of the moviefilm is converted into two fields, and the next frame is converted into3 fields, and the conversion pattern is repeated for every two frames. A2-3 pulldown telecine-converted signal also has the above characteristicbecause it exhibits a regular pattern in which an inter-field pixellevel difference varies in accordance with a parent frame-to-fieldrelationship.

Japanese Laid-Open Patent Publication No. 9-18784 (claiming a priorityof US application No. 94-366799) discloses a field interpolation methoddetermination device a field interpolation method determination devicewhich identifies whether an input interlaced signal is atelecine-converted signal based on an inter-field difference of theinput interlaced signal, and determines a field interpolation method.

Referring to FIG. 10, a video signal processing device havingincorporated therein a conventional field interpolation methoddetermination device is described. A video signal processing device 200shown in the figure converts an interlaced signal into a progressivesignal by carrying out inter-field interpolation only when an interlacedsignal is a telecine-converted signal, while intra-field interpolationis carried out if it is not the telecine-converted signal.

The video signal processing device 200 includes an input terminal 1, afield memory 2, a field memory 4, a subtractor 6, a field interpolationmethod determination section 108, an ODD/EVEN detection section 10, afirst switch 12, a line memory 14, a 2-line interpolation section 16, asecond switch 18, and a progressive signal generation section 20.

The input terminal 1 is supplied with an input interlaced signal Vin.The field memory 2 outputs a 1-field delay input interlaced signal Vd1delayed by one field with respect to the input interlaced signal Vin.The 1-field delay input interlaced signal Vd1 is inputted into theprogressive signal generation section 20 where either inter-fieldinterpolation or intra-field interpolation is performed on the signal.

The subtractor 6 obtains a difference in pixel level between the inputinterlaced signal Vin and the 1-field delay input interlaced signal Vd1,and outputs it as an inter-field pixel level difference Sp. Note that inthe interlaced signal, scanning lines of adjacent fields are displacedby one row from each other. Accordingly, the subtractor 6 obtains adifference between an average pixel level for two adjacent lines in onefield and a corresponding pixel level in the other field.

The field interpolation method determination section 108 determineswhether the input interlaced signal Vin is a telecine-converted signalbased on the inter-field pixel level difference Sp. The fieldinterpolation method determination section 108 outputs a fieldinterpolation method instruction signal Dvp that instructs to performeither the inter-field interpolation or the intra-field interpolation onthe 1-field delay input interlaced signal Vd1.

If a field interpolation method instruction signal Dvp, which instructsto perform the inter-field interpolation is inputted, the second switch18 selects an inter-field interpolation video signal Sw1 outputted fromthe first switch 12, and outputs it as an interpolation video signalSw2.

The inter-field interpolation signal video Sw1 is either of a 2-fielddelay input interlaced signal Vd2 and an input interlaced signal Vin,which respectively correspond to fields before and after the 1-fielddelay input interlaced signal Vd1, and it is selected as follows.

The ODD/EVEN detection section 10 detects whether the signal correspondsto an odd field or an even field based on the 1-field delay inputinterlaced signal Vd1, and outputs a field identification signal Doewhich indicates a detection result.

The first switch 12 selects either the 2-field delay input interlacedsignal Vd2 or the input interlaced signal Vin based on the fieldidentification signal Doe, and outputs it as the inter-fieldinterpolation video signal Sw1. Specifically, the first switch 12outputs the input interlaced signal Vin if the 1-field delay inputinterlaced signal Vd1 corresponds to an odd field, while it outputs the2-field delay input interlaced signal Vd2 if the 1-field delay inputinterlaced signal Vd1 corresponds to an even field.

The progressive signal generation section 20 interpolates the 1-fielddelay input interlaced signal Vd1 with the interpolation video signalSw2 outputted from the second switch 18 (in this case, either one of thecurrent signal Vin and the 2-field delay input interlaced signal Vd2,which has been selected by the first switch 12), thereby generating aprogressive signal. The frame of the thus-generated progressive signalis identical to the original parent frame, and enhanced in terms ofvertical resolution as compared to a frame generated by intra-fieldinterpolation which will be described later.

On the other hand, if a field interpolation method instruction signalDvp, which instructs to carry out intra-field interpolation, isoutputted from the field interpolation method determination section 108,the second switch 18 selects an intra-field interpolation video signalVd1S outputted from the 2-line interpolation section 16, and outputs itas an interpolation video signal Sw2.

The 2-line interpolation section 16 generates an intra-fieldinterpolation video signal Vd1S based on a I-line delay signal Vd1L,which is obtained by delaying the 1-field delay input interlaced signalVd1 by one line in the line memory 14, and the 1-field delay inputinterlaced signal Vd1.

The progressive signal generation section 20 interpolates the 1-fielddelay input interlaced signal Vd1 with the interpolation video signalSw2 outputted from the second switch 18 (in this case, the intra-fieldinterpolation signal Vd1S), thereby generating a progressive signal.

The subtractor 6 and the field interpolation method determinationsection 108 shown in FIG. 10 correspond to the conventional fieldinterpolation method determination device. Referring to FIG. 11, theconventional field interpolation method determination device isdescribed. FIG. 11 is a block diagram showing a detailed structure ofthe field interpolation method determination section 108 shown in FIG.10.

The field interpolation method determination section 108 includes anabsolute value circuit 81, a pixel difference determination comparator82, a cumulative adder 83, an inter-field correlation determinationcomparator 84, a first register 85, a second register 86, a 2-fielddifference determination comparator 189, an exclusive-OR (EOR) circuit190, a counter 92, and a count determination comparator 93.

Although not shown, a field pulse VP and a frame pulse FP are generatedby a timing generation circuit.

The absolute value circuit 81 obtains an absolute value of theinter-field pixel level difference Sp, which is calculated by thesubtractor 6 a and corresponds to a difference in level between pixelsof the input interlaced signal Vin and the 1-field delay inputinterlaced signal Vd1, and outputs an inter-field pixel level differenceabsolute value SpA.

The pixel difference determination comparator 82 compares theinter-field pixel level difference absolute value SpA with apredetermined first threshold X to provide a determination as to whethertwo comparison target fields have at least a great difference (asignificant difference) in pixel level to such an extent that they areconsidered as being derived from the same parent frame. As aninter-field pixel difference determination signal Dp, which indicates aresult of the determination, the pixel difference determinationcomparator 82 outputs “1” if the determination is “significantdifference”, or outputs “0” if it is “no significant difference”.

The cumulative adder 83 outputs an inter-field pixel differencedetermination cumulative value CDp which is obtained by cumulativelysumming inter-field pixel difference determination signals Dp. Theinter-field pixel difference determination cumulative value CDp is avalue which indicates the number of pixels having been determined ashaving a “significant difference” between fields of the input interlacedsignal Vin and the 1-field delay input interlaced signal Vd1. Note thatthe cumulative adder 83 is reset for each field by the field pulse VP.

If the inter-field pixel difference determination cumulative value CDpis greater than a predetermined threshold Y, the inter-field correlationdetermination comparator 84 determines that there is a differencebetween the fields. Then, it outputs an inter-field correlationdetermination signal Df which indicates a result of the determination.

The value of the inter-field correlation determination signal Df is “1”if there is a difference, or outputs “0” if there is no difference.

The first register 85 and the second register 86 are D-flip-flops, andsupplied with the field pulse VP as a clock. An inter-fielddetermination result is supplied to a series circuit composed of thefirst register 85 and the second register 86. The first register 85 andthe second register 86 output an inter-field difference stored thereinto the 2-field difference determination comparator 189 and the EORcircuit 190, respectively.

In the case where outputs of the first register 85 and the secondregister 86 are respectively “0” and “1”, or “1” and “0”, differentialrelationships between two sequential fields in respective cases are“small and large”, and “large and small”. That is, they show theabove-described characteristic of the telecine-converted interlacedsignal. In such a case, the 2-field difference determination comparator189 determines that the input interlaced signal Vin has beentelecine-converted, and outputs “1” to increment the counter 92.

On the other hand, if the outputs of the first register 85 and thesecond register 86 are respectively “0” and “0”, or “1” and “1”, thedifferential relationships between the two sequential fields are “smalland small” or “large and large”. That is, they do not show theabove-described characteristic of the telecine-converted interlacedsignal. In such a case, the EOR circuit 190 resets the counter 92.

As described above, the counter 92 is incremented or reset. If a countvalue CDs of the counter 92 reaches a predetermined value Z, the countdetermination comparator 93 outputs a field interpolation methodinstruction signal Dvp that instructs to perform inter-fieldinterpolation on fields of the input interlaced signal.

In actuality, however, there are various types of visual images, andtherefore in some cases, it is not possible to detect a differencebetween parent frames of even the telecine-converted signal as adifference between fields because there is no difference or only aslight difference between the parent frames. In such a case, the fieldinterpolation method determination device is not able to detect thetelecine-converted signal.

For example, in the case of video consisting of continuous still images,where images in two parent frames are identical to each other, adifference between fields converted from different parent frames isnaturally small. In such a case, the field interpolation methoddetermination device is not able to detect the difference between theparent frames based on the difference between fields. Consequently, theconventional field interpolation method determination device is not ableto detect an inter-field variation pattern specific to thetelecine-converted signal, and therefore the interlaced signal isdetermined not to be the telecine-converted signal.

Also, in visual images of dark scenes, even if they are dynamic images,there is only a small difference in pixel level between parent frames,and therefore a difference between fields converted from differentframes is also small. In such a case, similar to the above case, thefield interpolation method determination device determines that theinterlaced signal is not the telecine-converted signal.

Also, for example, in the case where interlaced signals for commercials,etc., which have a different frame correlation, are inserted betweeninterlaced signals for a program, correlations between parent frames andcorrelations between fields may vary in a specific manner. In such acase, an inter-field difference variation pattern specific to thetelecine-converted signal varies in a specific manner, and therefore,similar to the above case, the field interpolation method determinationdevice determines that the interlaced signals are not telecine-convertedsignals.

As such, in the case where a difference between at least two framescannot be detected, the conventional field interpolation methoddetermination device is not able to identify the telecine-convertedsignal, even if the input interlaced signal is the telecine-convertedsignal. As a result, the video signal processing device carries outintra-field interpolation until input interlaced signals for at least apredetermined number of fields are continuously determined to be thetelecine-converted signal. Accordingly, it is often the case where anoriginal parent frame cannot be generated with high vertical resolution.

Also, the above conventional technique has been described such that inthe telecine conversion, a parent frame is generally converted into anodd field and an even field following immediately thereafter. Inactuality, however, on rare occasion, a telecine-converted signal isobtained by converting the parent frame into an even field and an oddfield following immediately thereafter.

The conventional field interpolation method determination device selectsa frame immediately before or after an interpolation target signal as aninterpolation video signal depending on whether the target signalcorresponds to an odd frame or an even frame. Accordingly, in a signalwhere positional relationships between fields converted from parentframes are reversed, two fields converted from different parent framesare interpolated with each other and converted into one frame. As aresult, different images are present in one frame, and therefore videoquality of a progressive signal obtained by conversion is considerablydeteriorated.

Therefore, an object of the present invention is to provide a fieldinterpolation method determination device capable of accuratelydetecting a field-to-frame relationship of an input interlaced signaleven if it is not possible, or it is difficult, to specifically detect adifference between parent frames, thereby determining whether to useeither inter-field interpolation or intra-field interpolation to performan interpolation operation.

DISCLOSURE OF THE INVENTION

To achieve the above object, the present invention has the followingfeatures.

A first aspect of the present invention is directed to a fieldinterpolation method determination device for determining whether toperform either an inter-field interpolation method or an intra-fieldinterpolation method to combine fields of an inputted interlaced signalinto frames and thereby to provide conversion to a progressive signal,the device comprising:

-   -   pixel level difference detection means for detecting a pixel        level difference between an input interlaced signal and a        1-field delay input interlaced signal obtained by delaying the        input interlaced signal by one field;    -   field correlation detection means for detecting correlation        between the input interlaced signal and the 1-field delay input        interlaced signal based on the pixel level difference, and        outputting N-1 inter-field correlation determination signals;    -   inter-field difference storage means for storing the N-1        inter-field correlation determination signals;    -   field/frame correlation determination means for determining,        based on a pattern of values of the N-1 inter-field difference        determination signals, whether two sequential fields among the N        sequential fields are generated from a same frame or different        frames; and    -   interpolation method determination means for determining, as an        interpolation method, inter-field interpolation if the fields        are determined to have been generated from the same frame, or        intra-field interpolation if the fields are determined to have        been generated from the different frames.

In the above first aspect, sequential fields, which exceed N-1 fieldscorresponding to two parent frames, are targeted for determination, andcorrelations between at least N fields are detected. Aparent-frame-to-field relationship is determined in a multistage mannerbased on the correlations between the N fields, achieving a significanteffect of more accurately determining a method for interpolating theinput interlaced signal.

Also, the parent-frame-to-field relationship is determined based on apattern of correlations between all fields targeted for determination,whereby it is possible to achieve a significant effect of increasingaccuracy in determining the method for interpolating the inputinterlaced signal with an increase in number of fields targeted fordetermination.

Also, in the case where the parent-frame-to-field relationship cannot bereliably determined, a distinction result for an input interlaced signalbefore determination is not changed. This prevents erroneous distinctionbetween input interlaced signals due to an unreliable determinationresult, achieving a significant effect of more accurately determiningthe method for interpolating the input interlaced signal.

In a second aspect based on the first aspect, the device furthercomprises interpolation method determination delay means for delaying adetermination of the interpolation method by the interpolation methoddetermination means by a predetermined time period.

In a third aspect based on the second aspect, the predetermined timeperiod is determined based on a time lag from when the interpolationmethod of inputted fields are determined until an interpolation processis actually performed.

In a fourth aspect based on the third aspect, the predetermined timeperiod is determined to be around 0.5 seconds based onmechanical/electrical characteristics of the field interpolation methoddetermination device and a device which carries out the fieldinterpolation process.

In a fifth aspect based on the second aspect, counter means incrementsby one count if the fields are determined to have been generated fromthe same frame, resets a count value if they are determined to have beengenerated from the different frames, or maintains the count value ifotherwise, and

-   -   the interpolation method determination means selects the        inter-field interpolation if the count value is greater than a        predetermined value, or selects the intra-field interpolation if        the count value is less than or equal to the predetermined        value.

In a sixth aspect based on the first aspect, if the input interlacedsignal is a 2-3 pulldown signal, N is equal to or more than 6.

In a seventh aspect based on the first aspect, if the input interlacedsignal is a 2-2 pulldown signal, N is equal to or more than 5.

In an eighth aspect based on the first aspect, if at least twosequential signals among the N-1 inter-field correlation determinationsignals indicate absence of correlation, the field/frame correlationdetermination means determines that the two sequential fields have beengenerated from the different frames.

In a ninth aspect based on the first aspect, if the N-1 inter-fieldcorrelation determination signals alternately indicate presence andabsence of correlation, the field/frame correlation determination meansdetermines that the two sequential fields have been generated from thesame frame.

In a tenth aspect based on the first, the field correlation detectionmeans includes:

-   -   pixel difference determination means for determining for each        pixel whether the pixel signal level difference is greater than        a first threshold which indicates a predetermined pixel level        and outputting a pixel unit level difference determination        result represented by a binary value;    -   field unit level difference determination means for adding one        field to the pixel unit level difference determination result,        and outputting a field unit level difference determination        result; and    -   inter-field correlation determination means for determining        whether inter-field correlation is significant based on whether        the field unit level difference determination result is greater        than a second threshold indicating a predetermined number of        pixels.

In an eleventh aspect based on the tenth aspect, the inter-fielddifference determination means further includes: signal level detectionmeans for detecting a signal level indicating brightness of an imagerepresented by the 1-field delay input interlaced signal; and

-   -   first threshold change means for changing the first threshold        based on the value of the signal level.

In a twelfth aspect based on the tenth aspect, the inter-fielddifference determination means further includes: signal level detectionmeans for detecting a signal level indicating brightness of an imagerepresented by the 1-field delay input interlaced signal; and

-   -   second threshold change means for changing the second threshold        based on the value of the signal level.

In the eleventh or twelfth aspect, a threshold for detecting theinter-field correlation is changed in accordance with the brightness ofthe image represented by the input interlaced signal, achieving asignificant effect of more accurately detecting an inter-fieldcorrelation in an input interlaced signal for a dark visual image wherethe inter-field correlation is hard to detect.

In a thirteenth aspect based on the first aspect, the inter-fielddifference determination means further includes: field identificationmeans for outputting, based on the 1-field delay input interlacedsignal, a field identification signal which indicates whether a field ofthe 1-field delay input interlaced signal is an even field or an oddfield; and

-   -   an AND circuit for calculating a logical product of the field        identification means and the inter-field correlation        determination signal, and outputting the product (to the N        inter-field difference storage means.

In the thirteenth aspect, a parent frame-to-field relationship isdetermined based on a logical product of an inter-field correlationdetection result and an even field/off field detection result for aninterpolation target field. Thus, it is possible to achieve asignificant effect of preventing misinterpolation of a field before orafter an interpolation target field which occurs due to a reversal ofthe order of even and odd fields, even in the case where an interlacedsignal, where the order of the even and odd fields are reversed withrespect to a parent frame, is inputted to a device which interpolatesthe field before or after the interpolation target field based on adetection result of the even field or the odd field.

In a fourteenth aspect based on the thirteenth aspect, the inter-fielddifference determination means further includes: an inverter foroutputting a reversed signal of the field identification signal; and

-   -   a field identification signal reverse switch for selectively        outputting either the field identification signal or the        reversed signal to the AND circuit.

In the fourteenth aspect, the switch is provided for selecting an evenfield/odd field detection result for the interpolation target field anda reversed signal for the even field/odd field detection result, and aparent frame-to-field relationship is determined based on a logicalproduct of the even field/odd field detection result selected by theswitch and an inter-field correlation detection result. Thus, it ispossible to achieve a significant effect of selecting a field separatedfrom the same parent frame of the interpolation target field andgenerating the original parent frame, even in the case where aninterlaced signal, where the order of the even and odd fields arereversed with respect to a parent frame, is inputted to a device whichinterpolates the field before or after the interpolation target fieldbased on a detection result of the even field or the odd field.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a structure of a video signalprocessing device having incorporated therein a field interpolationmethod determination device according to a first embodiment of thepresent invention.

FIG. 2 is a diagram showing a detailed structure of a fieldinterpolation method determination section shown in FIG. 1.

FIG. 3 is a table showing relationships between output values of firstthrough fourth registers shown in FIG. 2 and signals inputted into acounter.

FIG. 4 is a diagram showing relationships between fields of inputinterlaced signals and frames of a progressive signal after conversionin accordance with the first embodiment of the present invention.

FIG. 5 is a block diagram showing a structure of a video signalprocessing device having incorporated therein a field interpolationmethod determination device according to a second embodiment of thepresent invention.

FIG. 6 is a diagram showing a detailed structure of a fieldinterpolation method determination section shown in FIG. 5.

FIG. 7 is a block diagram showing a structure of a video signalprocessing device having incorporated therein a field interpolationmethod determination device according to a third embodiment of thepresent invention.

FIG. 8 is a diagram showing a detailed structure of a fieldinterpolation method determination section shown in FIG. 7.

FIG. 9 is a block diagram showing a structure of a video signalprocessing device having incorporated therein a field interpolationmethod determination device according to a fourth embodiment of thepresent invention.

FIG. 10 is a block diagram showing a structure of a video signalprocessing device having incorporated therein a conventional fieldinterpolation method determination device according to a fourthembodiment of the present invention.

FIG. 11 is a diagram showing a detailed structure of a fieldinterpolation method determination section shown in FIG. 10.

BEST MODE FOR CARRYING OUT THE INVENTION

Before specifically describing field interpolation method determinationdevices according to embodiments of the present invention, the basicconcept of the present invention is now described. As described inrelation to conventional techniques, an erroneous determination by afield interpolation method determination device is caused because thereis no difference, or only a slight difference, between parent frames, sothat a difference between fields converted from two different frames.

In the case where fields targeted for determination include only oneborder between parent frames, so that it is not possible to detect adifference between two parent frames of an input interlaced signal, theconventional field interpolation method determination device determinesto carry out intra-interpolation.

However, even in the case where no difference between two parent framescan be specifically detected, if the number of fields targeted fordetermination is increased so as to increase inter-parent frame bordersamong the fields, it is made possible to evaluate correlations betweenparent frames and fields in a multistage manner.

From this point of view, it is apparent that the field interpolationmethod determination device can more accurately identify a video signalif the number of fields targeted for determination is increased. Thatis, in order to more accurately identify the video signal, it isdesirable to increase the number of fields targeted for determination toinfinity. However, it also increases the number of registers for storingdifferences between fields, resulting in an infinite increase in cost ofthe field interpolation method determination device.

Accordingly, in the present invention, the number of fields targeted fordetermination is dynamically changed based on differences between apredetermined number or more of fields including at least twointer-field borders. Accordingly, if the number of fields converted fromtwo parent frames is N-1, differences between at least N fields aretargeted for determination. That is, the number of differences betweenfields targeted for determination is at least N-1.

Also, if a difference between parent frames is insignificant, andtherefore cannot be detected as a difference between fields, a thresholdfor determining an inter-field difference is dynamically changed inorder to detect a smaller inter-field difference.

In the present invention, the number of fields targeted fordetermination or the threshold for detecting the inter-field differenceis dynamically changed based on the above technical idea, making itpossible to more accurately identify a video signal.

Also, as described above, in a telecine-converted signal in whichpositional relationships between fields converted from parent frames arereversed, two fields converted from different parent frames areinterpolated with each other to form a frame. As a result, differentimages are contained in one frame, and therefore video quality of aprogressive signal obtained by conversion is considerably deteriorated.

Such an interlaced signal, where positional relationships between fieldsconverted from parent frames are reversed, is opposite to an ordinarytelecine-converted signal in terms of relationships in size betweenfields and relationships between odd and even fields. Therefore, in thepresent invention, a signal, which indicates correlation between fields,is corrected by a detection signal, which indicates whether fields areodd-/even-numbered, thereby preventing fields converted from differentframes from being subjected to mutual inter-field interpolation.

In the present invention, relationships between fields and parent framesin an interlaced signal converted from a progressive signal aredetermined, and each field of the interlaced signal is interpolatedusing inter-field interpolation or intra-field interpolation. Describedbelow is a case where a 2-2 pulldown telecine-converted signal isdetected as a typical example of a signal obtained by converting theprogressive signal into the interlaced signal.

FIRST EMBODIMENT

Referring to FIG. 1, a video signal processing device havingincorporated therein a field interpolation method determination deviceaccording to the present invention is described. A video signalprocessing device 100 a shown in the figure is operable to determinerelationships between fields and parent frames in an input interlacedsignal, and if the input interlaced signal is a telecine-convertedsignal, it converts the fields of the input interlaced signal intoframes of a progressive signal by performing inter-field interpolation.On the other hand, if the input interlaced signal is not atelecine-converted signal, the video signal processing device 100 aconverts the fields of the input interlaced signal into the frames ofthe progressive signal by performing intra-field interpolation.

The video signal processing device 100 a includes an input terminal 1, afield memory 2, a field memory 4, a subtractor 6, a field interpolationmethod determination section 8 a, an ODD/EVEN detection section 10, afirst switch 12, a line memory 14, a 2-line interpolation section 16, asecond switch 18, and a progressive signal generation section 20.

The input terminal 1, the field memory 2, the field memory 4, thesubtractor 6, the ODD/EVEN detection section 10, the first switch 12,the line memory 14, the 2-line interpolation section 16, the secondswitch 18, and the progressive signal generation section 20 are the sameas those of the conventional video signal processing device 200 shown inFIG. 11, and therefore the descriptions thereof are omitted.

The field interpolation method determination section 8 a determinesdetermines relationships between fields and parent frames in the inputinterlaced signal based on an inter-field pixel level difference Sp, anddetermines whether to use either inter-field interpolation orintra-field interpolation to convert a 1-field delay input interlacedsignal Vd1 into a progressive signal.

Referring to FIG. 2, a configuration of the field interpolation methoddetermination section 8 a is described. The field interpolation methoddetermination section 8 a includes an absolute value circuit 81, a pixeldifference determination comparator 82, a cumulative adder 83, aninter-field correlation determination comparator 84, a first register85, a second register 86, a third register 87, a fourth register 88, a4-field correlation determination comparator 89, a reset determinationcircuit 90, and a switch 91.

Although not shown, a field pulse VP and a frame pulse FP are generatedby a timing generation circuit.

The absolute value circuit 81 obtains an absolute value of theinter-field pixel level difference Sp calculated by the subtractor 6,and outputs it as an inter-field pixel level difference absolute valueSpA. Note that, in the interlaced signal, scanning lines of adjacentfields are displaced by one row from each other. Accordingly, thesubtractor 6 obtains a difference between an average pixel level for twoadjacent lines in one field and a corresponding pixel level in the otherfield.

The pixel difference determination comparator 82 compares theinter-field pixel level difference absolute value SpA with apredetermined first threshold X to provide a determination as to whethertwo fields have at least a great difference (a significant difference)in pixel level to such an extent that they are considered as beingderived from the same parent frame.

Accordingly, the first threshold X is set so as to correspond to adifference in pixel level which can be determined not to significantlydiffer from a difference in pixel level between fields separated fromthe same frame. Then, as an inter-field pixel difference determinationsignal Dp, which indicates a result of the determination, the pixeldifference determination comparator 82 outputs “1” if the determinationis “significant difference”, or outputs “0” if it is “no significantdifference”.

The cumulative adder 83 outputs an inter-field pixel differencedetermination cumulative value CDp which is obtained by cumulativelysumming inter-field pixel difference determination signals Dp. Theinter-field pixel difference determination cumulative value CDp is avalue which indicates the number of pixels having been determined ashaving a “significant difference” between fields of the input interlacedsignal Vin and the 1-field delay input interlaced signal Vd1. Note thatthe cumulative adder 83 is reset for each field by the field pulse VP.

The inter-field correlation determination comparator 84 determineswhether a field of the input interlaced signal Vin and a field of the1-field delay input interlaced signal Vd1 are correlated to such anextent that they can be considered as being derived from the same frame.Specifically, the inter-field correlation determination comparator 84determines that there is no correlation between the fields if theinter-field pixel difference determination cumulative value CDp isgreater than a predetermined threshold Y. On the other hand, theinter-field correlation determination comparator 84 determines thatthere is correlation between fields if the inter-field pixel differencedetermination cumulative value CDp is less than or equal to thepredetermined threshold Y. Then, the inter-field correlationdetermination signal Df indicating a result of the determination isoutputted.

The value of the inter-field correlation determination signal Df is “0”if there is correlation, or “1” if there is no correlation.

The first register 85, the second register 86, the second register 87,and the fourth register 88 are D-flip-flops, and supplied with the fieldpulse VP as a clock. These four registers sequentially store acorresponding one of four sequential inter-field correlationdetermination signals Df. Also, values of the stored four inter-fieldcorrelation determination signals are outputted as register outputsignals (R1-R4).

The 4-field correlation determination comparator 89 compares the fourregister output signals (R1-R4) with a telecine determination table Tcto determine whether the current input video signal has an inter-fieldcorrelation pattern of a telecine-converted signal.

A table TC shown in FIG. 3 is the telecine determination table Tc. Ifoutput values of the four register output signals (R1-R4) shown in thetable Tc are respectively “0101” or “1010”, inter-field correlationmatches the characteristic of a 2-2 pulldown telecine-converted signalin which large and small values alternate with each other. In this case,the 4-field correlation determination comparator 89 determines that theinput interlaced signal Vin is a telecine-converted signal. Then, the4-field correlation determination comparator 89 outputs a telecinedetermination signal Ds.

The reset determination circuit 90 compares the four register outputsignals (R1-R4) with a reset determination table Tr to reliablydetermine whether the current input video signal is a telecine-convertedsignal.

A table Tr shown in FIG. 3 is the reset determination table Tr. Even ifany value of the four register output signals (R1-R4) which is equal to“0” is changed to “1”, all patterns shown in the reset table Tr cannotcorrespond to either “0101” or “1010” which matches the inter-fieldcorrelation pattern of the 2-2 pulldown telecine-converted signal.

That is, it can be reliably determined that the input interlaced signalVin is not the 2-2 pulldown telecine-converted signal. Accordingly, thereset determination circuit 90 outputs a reset signal Rst.

Also, a table T1 shown in FIG. 3 shows four register output signals(R1-R4) which do not belong to either the telecine determination tableTc or the reset determination table Tr. Each set of output values of theregisters shown in the table T1 matches the inter-field correlationpattern of the 2-2 pulldown telecine-converted signal if the outputvalue of at least one register is changed from “0” to “1”.

The switch 91 outputs, based on the telecine determination signal Ds andthe reset signal, a field interpolation method instruction signal Dv1that instructs to perform either inter-field interpolation orintra-field interpolation on the 1-field delay input interlaced signalVd1.

Specifically, the switch 91 outputs a field interpolation methodinstruction signal Dv1 that instructs to perform inter-fieldinterpolation if the telecine determination signal Ds is outputted,while it outputs a field interpolation method instruction signal Dv1that instructs to perform intra-field interpolation if the reset signalRst is outputted. Also, if neither the telecine determination signal Dsnor the reset signal Rst is outputted, the switch 91 does not change thefield interpolation method instruction signal Dv1.

Next, referring to FIG. 4, an operation of the video signal processingdevice 100 a is described. The input interlaced signal Vin is obtainedby converting parent frames A, B, and C of a progressive signal into A1and A2, B1 and B2, and C1 and C2, respectively. Fields of the inputinterlaced signal Vin1 are entered in “field No.” in the order fromsmallest to largest.

Correlation between two fields is determined based on a differencebetween the input interlaced signal Vin and the 1-field delay inputinterlaced signal Vd1. For example, correlation between field B2 infield No. 4 of the input interlaced signal Vin and field B1 of the1-field delay input interlaced signal Vd1 is determined. In this case,the fields are both converted from the same frame B, and therefore adifference therebetween is small. That is, they are determined as havinga correlation, and the value of the field correlation determinationsignal Df is “0”.

As for field No. 5 of the input interlaced signal Vin, field C1 of theinput interlaced signal Vin and field B2 of the 1-field delay inputinterlaced signal Vd1 are converted from different frames, and thereforethere is a large difference therebetween. That is, they are determinedas having no correlation, and the value of the field correlationdetermination signal Df is “1”.

The field correlation determination signal Df sequentially stored intofour registers 85-88, and four sequential register outputs arerepresented by “0101” or “1010”.

As such, if values of the field correlation determination signal Df are“0101” or “1010”, the switch 91 outputs a signal that instructs toperform inter-field interpolation as the interpolation methodinstruction signal Dv1.

In this case, the first switch 12 selects either the input interlacedsignal Vin or the 2-field delay input interlaced signal Vd2 based on afield identification signal Doe obtained by the ODD/EVEN detector 10.

Specifically, if the 1-field delay input interlaced signal Vd1corresponds to an odd field, the input interlaced signal Vin isselected. On the other hand, if the 1-field delay input interlacedsignal Vd1 corresponds to an even field, the 2-field delay inputinterlaced signal Vd2 is selected.

For example, if the field B2 in field No. 4 is inputted as the inputinterlaced signal Vin, a field inputted as an interpolation targetsignal to the progressive signal generation section 20 is the field B1in field No. 3. In this case, inter-field interpolation is performedusing the field B2, which is the input interlaced signal Vin, as aninterpolation signal Sw2 to generate the original parent frame B.

Also, if field C1 in field No. 5 is inputted as the input interlacedsignal Vin, a field inputted as an interpolation target signal to theprogressive signal generation section 20 is the field B2 in field No. 4.In this case, inter-field interpolation is performed using the field B1,which is the 2-field delay input interlaced signal Vd2, as theinterpolation signal Sw2 to generate the original parent frame B.

In the conventional field interpolation method determination device,correlation between two fields containing only one border between parentframes is used as a determination target to detect a correspondencebetween parent frames and fields, thereby detecting a telecine-convertedsignal. Then, in the case where no difference between frames can bedetected, the correspondence between parent frames and fields isunclear, and therefore the field interpolation method determinationdevice determines that the input interlaced signal is not atelecine-converted signal.

On the other hand, in the field interpolation method determinationdevice according to the present embodiment, differences between fieldsin such a number as to contain two or more inter-frame borders aretargeted for determination. Accordingly, even if a difference betweenframes cannot be detected, it is possible to determine whether the inputinterlaced signal is the telecine-converted signal based on a pluralityof inter-frame differences. Also, a plurality of frame borders arecontained in the determination target, and therefore it is possible toevaluate all fields targeted for determination in a multistage mannerbased on a determination about each frame border.

Accordingly, even if no inter-frame difference can be detected, anintermediate determination is not made to immediately provide adetermination of not being the telecine-converted signal. Therefore,even if an inter-frame difference cannot be specifically detected, aprevious field interpolation method is not changed, causing no reductionin image quality due to an erroneous instruction to perform intra-fieldinterpolation. Thus, even if the telecine-converted signal from whichany inter-frame difference is difficult to detect is inputted, the fieldinterpolation method determination device according to the presentembodiment is able to more accurately determine a field interpolationmethod.

SECOND EMBODIMENT

Referring to FIG. 5, a video signal processing device havingincorporated therein a field interpolation method determination deviceaccording to a second embodiment of the present invention is described.The field interpolation method determination device according to thepresent embodiment is characterized in that even in the case where avisual image is dark, so that a difference in pixel level between parentframes is small, a threshold for determining an inter-field pixeldifference can be changed in accordance with the brightness of thevisual image, whereby it is possible to detect an inter-field differenceresulted from an inter-frame difference.

Accordingly, a configuration of a video signal processing device 100 bshown in FIG. 5 is different from that of the video signal processingdevice according to the first embodiment in that the field interpolationmethod determination section 8 a is replaced with a field interpolationmethod determination section 8 b. In order to avoid redundantdescriptions, the same elements as those of the video signal processingdevice according to the first embodiment are not described.

The video signal processing device 100 b includes an input terminal 1, afield memory 2, a field memory 4, a subtractor 6, a field interpolationmethod determination section 8 b, an ODD/EVEN detection section 10, afirst switch 12, a line memory 14, a 2-line interpolation section 16, asecond switch 18, and a progressive signal generation section 20.

The field interpolation method determination section 8 b determinesdetermines relationships between fields and parent frames in an inputinterlaced, based on a 1-field delay input interlaced signal Vd1 and aninter-field pixel level difference Sp, and determines whether to useeither inter-field interpolation or intra-field interpolation to convertthe 1-field delay input interlaced signal Vd1 into a progressive signal.

Referring to FIG. 6, a configuration of the field interpolation methoddetermination section 8 b is described. The configuration of the fieldinterpolation method determination section 8 b is different from that ofthe field interpolation method determination section 8 a according tothe first embodiment in that the switch 91 is replaced by a counter 92and a count determination comparator 93, and an auto picture level (APL)detector 94 b and a pixel difference threshold change section 95 b areadded.

The field interpolation method determination section 8 b includes anabsolute value circuit 81, a pixel difference determination comparator82, a cumulative adder 83, an inter-field correlation determinationcomparator 84, a first register 85, a second register 86, a thirdregister 87, a fourth register 88, a 4-field correlation determinationcomparator 89, a reset determination circuit 90, the counter 92, thecount determination comparator 93, the auto picture level detector 94 b,and the pixel difference threshold change section 95 b.

The auto picture level detector 94 b detects a signal level PL of the1-field delay input interlaced signal Vd1. The signal level PL isincreased as a visual image becomes brighter, while it is decreased asthe image becomes darker.

The pixel difference threshold change section 95 b changes the value ofa pixel difference threshold Xb based on the signal level PL inaccordance with a predetermined rule. For example, values of a pluralityof pixel difference thresholds Xb may be predetermined so as tocorrespond to degrees of the signal level PL, making it possible tooutput the value of a corresponding pixel difference threshold Xb inaccordance with an inputted signal level PL, or the value of the pixeldifference threshold Xb may be obtained based on the signal level PL inaccordance with a predetermined mathematical expression.

In any case, settings are made such that the pixel difference thresholdXb is increased as the signal level PL becomes higher, and decreased asthe signal level PL becomes lower.

Therefore, in the case where the 1-field delay input interlaced signalVd1 corresponds to a dark visual image, the value of the pixeldifference threshold Xb is small, and therefore the pixel differencedetermination comparator 82 determines that there is a difference inpixel level between fields even if the difference in pixel level issmaller. On the other hand, in the case where the 1-field delay inputinterlaced signal Vd1 corresponds to a bright visual image, the value ofthe pixel difference threshold Xb is large, and therefore it is possibleto prevent an erroneous determination that there is a difference inpixel level between fields converted from the same frame.

The counter 92 counts a telecine determination cumulative value CDswhich is incremented by the telecine determination signal Ds. Also, itis reset by the reset signal Rst.

Also, as described above, if there is no difference or only a slightdifference between parent frames, no difference between fields convertedfrom different frames is detected, and therefore in some cases, it isnot determined as being a telecine-converted signal even if it is thetelecine-converted signal. Accordingly, in the case where it is notpossible to reliably determine whether the input interlaced signal Vinis the telecine-converted signal, the count of the telecinedetermination counter 92 is not changed.

If the telecine determination cumulative value CDs of the counter 92exceeds a predetermined threshold Z, the count determination comparator93 outputs a field interpolation method instruction signal Dv1 thatinstructs to perform inter-field interpolation on fields of the 1-fielddelay input interlaced signal Vd1, in order to enhance the stability ofthe field interpolation method determination section 8 b. The thresholdZ is set so as to correspond to a time period from when the telecinedetermination signal Ds is outputted until inter-field interpolation isactually implemented, and normally it is set so as to be 0.5 seconds.

That is, the video signal processing device according to the presentembodiment has no potential for erroneous detection even in the case ofa bright visual image, and is able to more accurately detect aninter-field difference even if a difference in pixel level betweenframes is small because of a dark visual image.

Note that in the present embodiment, although it is assumed that thefirst threshold X is dynamically changed based on the signal level PL ofthe 1-field delay input interlaced signal Vd1, the second threshold Ymay be changed. This allows a determination that there is an inter-fielddifference even if there is only a small number of pixel levels whichrepresent a significant difference between fields, achieving an effectsimilar to that achieved in the case of changing the first threshold X.

THIRD EMBODIMENT

Referring to FIG. 7, a video signal processing device havingincorporated therein a field interpolation method determination deviceaccording to a third embodiment of the present invention is described.In the field interpolation method determination devices according to thefirst and second embodiments, if an interlaced signal in whichpositional relationships between odd and even fields with respect toparent frames are reversed is inputted, inter-field interpolation isperformed on fields of different parent frames. As described above, ifinter-field interpolation is performed on fields converted fromdifferent parent frames, video quality of a frame to be generated isconsiderably deteriorated.

The field interpolation method determination device according to thepresent embodiment is characterized by preventing inter-fieldinterpolation from being erroneously performed on fields converted fromdifferent frames, even in the case of receiving an interlaced signal,where positional relationships between odd and even fields with respectto parent frames are reversed, in other words, an interlaced signal,where each parent frame is converted into an even field and an odd fieldfollowing immediately thereafter.

Accordingly, a configuration of the video signal processing device 100 cshown in FIG. 7 is different from that of the video signal processingdevice according to the first embodiment in that the field interpolationmethod determination section 8 a is replaced with a field interpolationmethod determination section 8 c. In order to avoid redundantdescriptions, the same elements as those of the video signal processingdevice according to the first embodiment are not described.

The video signal processing device 100 c includes an input terminal 1, afield memory 2, a field memory 4, a subtractor 6, a field interpolationmethod determination section 8 c, an ODD/EVEN detection section 10, afirst switch 12, a line memory 14, a 2-line interpolation section 16, asecond switch 18, and a progressive signal generation section 20.

The field interpolation method determination section 8 c determinesdetermines relationships between fields and parent frames in an inputinterlaced based on a field identification signal Doe and an inter-fieldpixel level difference Sp, and determines whether to using eitherinter-field interpolation or intra-field interpolation to convert a1-field delay input interlaced signal Vd1 into a progressive signal.

Referring to FIG. 8, a configuration of the field interpolation methoddetermination section 8 c is described. The configuration of the fieldinterpolation method determination section 8 c is different from thefield interpolation method determination section 8 according to thefirst embodiment that an AND circuit 96 c is added.

The field interpolation method determination section 8 c includes anabsolute value circuit 81, a pixel difference determination comparator82, a cumulative adder 83, an inter-field correlation determinationcomparator 84, a first register 85, a second register 86, a thirdregister 87, a fourth register 88, a 4-field correlation determinationcomparator 89, a reset determination circuit 90, a counter 92, a countdetermination comparator 93, and the AND circuit 96 c.

The AND circuit 96 c obtains a logical product of an inter-fielddifference signal Df and a field identification signal Doe, and outputsa modified inter-field difference signal Dfa. Referring to FIG. 4, themodified inter-field difference signal Dfa is described.

In the case where an ordinary telecine-converted signal is inputted, thevalue of the inter-field difference signal Df is “0” if the 1-fielddelay input interlaced signal Vd1 corresponds to an odd field, and thevalue of the inter-field difference signal Df is “1” if the 1-fielddelay input interlaced signal Vd1 corresponds to an even field.

The ODD/EVEN detection section outputs “0” as the field identificationsignal Doe if the 1-field delay input interlaced signal Vd1 correspondsto an odd field, while it outputs “0” as the field identification signalDoe if the 1-field delay input interlaced signal Vd1 corresponds to aneven field.

In this case, the value of the modified inter-field difference signalDfa is equal to that of the inter-field difference signal Df, andtherefore a telecine detection signal Vd3, which indicates a detectionresult of the telecine-converted signal, is not affected.

Next, consider a case where an interlaced signal, in which positionalrelationships between odd and even fields with respect to parent framesare reversed, is inputted. In this case, contrary to the foregoing, ifthe 1-field delay input interlaced signal Vd1 corresponds to an oddfield, the value of the inter-field difference signal Df is “1”, and ifthe 1-field delay input interlaced signal Vd1 corresponds to an evenfield, the value of the inter-field difference signal Df is “0”.

Since the value of the field identification signal Doe does not change,the value of any modified inter-field difference signal Dfa is “0”.Accordingly, the counter 92 is not incremented, so that no telecinedetection signal Dv3 is outputted. As a result, intra-fieldinterpolation is performed instead of inter-field interpolation.

Thus, even in the case where the interlaced signal, in which positionalrelationships between odd and even fields with respect to parent framesare reversed, is inputted, it is possible to prevent inter-fieldinterpolation from being performed on fields converted from differentframes.

In the field interpolation method determination device according to thepresent embodiment, a considerable reduction in video quality isprevented, but because inter-field interpolation is carried out, even inthe case of the telecine-converted signal, it is not possible to carryout a reconversion to the original parent frame to enhance verticalresolution.

FOURTH EMBODIMENT

A field interpolation method determination device according to a fourthembodiment is characterized by performing inter-field interpolation onfields converted from the same parent frame even in the case where aninterlaced signal, in which positional relationships between odd andeven fields with respect to parent frames are reversed, is inputted.

Referring to FIG. 9, a video signal processing device havingincorporated therein a field interpolation method determination deviceaccording to the present embodiment is described.

The field interpolation method determination device according to thepresent embodiment is characterized by selectively reversing the valueof the field identification signal Doe, and outputting it to the fieldinterpolation method determination section 8 c and the first switch 12.

Accordingly, a configuration of the video signal processing device 100 cshown in FIG. 9 is different from that of the video signal processingdevice according to the third embodiment in that an inverter 22 d and afield identification signal reverse switch are added. In order to avoidredundancy of descriptions, the same elements as those of the videosignal processing device according to the first embodiment are notdescribed.

The video signal processing device 100 d includes an input terminal 1, afield memory 2, a field memory 4, a subtractor 6, a field interpolationmethod determination section 8 c, an ODD/EVEN detection section 10, afirst switch 12, a line memory 14, a 2-line interpolation section 16, asecond switch 18, a progressive signal generation section 20, theinverter 22 d, and the field identification signal change switch 23 d.

The inverter 22 d receives a field identification signal Doe, invertsthe value of the signal, and outputs a field identification invertedsignal nDoe.

The field identification signal change switch 23 d selectively outputs,as a field identification signal Swf, either the field identificationsignal Doe or the field identification inverted signal nDoe.

In the case where an interlaced signal, in which positionalrelationships between odd and even fields with respect to parent framesare reversed, is inputted, the field identification signal change switch23 d is operated such that a signal, which is outputted to the fieldinterpolation method determination section 8 c and the first switch 12,is switched to the field identification inverted signal nDoe.

In this case, in the field interpolation method determination section 8c and the first switch 12, even the interlaced signal, in whichpositional relationships between odd and even fields with respect toparent frames are reversed, is handled in a manner similar to anordinary interlaced signal.

Accordingly, the field interpolation method determination section 8 c isable to detect a telecine-converted signal, while the first switch 12 isable to suitably select an inter-field interpolation signal. Thus, thevideo signal processing device according to the present embodiment isable to convert even the interlaced signal, in which positionalrelationships between odd and even fields with respect to parent framesare reversed, into a progressive signal with vertical resolutionenhanced by inter-field interpolation.

INDUSTRIAL APPLICABILITY

As described above, the present invention provides a field interpolationmethod determination device capable of dynamically changing the numberof fields targeted for determination and a threshold for determiningcorrelation between fields even in the case where it is not possible orit is difficult to specifically detect a difference between parentframes, and capable of accurately detecting relationships between fieldsand parent frames in an input interlaced signal, thereby determiningwhether to perform either inter-field interpolation or intra-fieldinterpolation.

1. A field interpolation method determination device (6,8 a) fordetermining whether to perform either an inter-field interpolationmethod or an intra-field interpolation method on fields of an inputtedinterlaced signal (Vin) to provide conversion to a progressive signal(Vpr), the device comprising: pixel level difference detection means(6,81) for detecting a pixel level difference (SpA) between the inputinterlaced signal (Vin) and a 1-field delay input interlaced signal(Vd1) obtained by delaying the input interlaced signal (Vin) by onefield; field correlation detection means (6,81,82,83,84) for detectingcorrelation between the input interlaced signal (Vin) and the 1-fielddelay input interlaced signal (Vd1) based on the pixel level difference(SpA), and outputting inter-field correlation determination signals(Df); inter-field correlation storage means (85,86,87,88) for storingN-1 inter-field correlation determination signals (Df:R1,R2,R3,R4)corresponding to N sequential fields of the input interlaced signal;field/frame correlation determination means (89,90) for determining,based on a pattern of values (R1,R2,R3,R4) of the N-1 inter-fieldcorrelation determination signals, whether the N sequential fields areeither 2-2 or 2-3 pulldown-converted; and interpolation methoddetermination means (91) for determining, as an interpolation method,inter-field interpolation if the fields are determined to have beeneither 2-2 or 2-3 pulldown-converted, or intra-field interpolation ifthe fields are determined to have been neither 2-2 nor 2-3pulldown-converted.
 2. A field interpolation method determination device(6,8 a) according to claim 1, further comprising interpolation methoddetermination delay means (92,93) for delaying a determination of theinterpolation method by the interpolation method determination means(91) by a predetermined time period.
 3. A field interpolation methoddetermination device according to claim 2, wherein the predeterminedtime period is determined based on a time lag from when theinterpolation method of the inputted fields are determined until aninterpolation process is actually performed.
 4. A field interpolationmethod determination device according to claim 3, wherein thepredetermined time period is determined to be around 0.5 seconds basedon mechanical/electrical characteristics of the field interpolationmethod determination device and a device which carries out the fieldinterpolation process.
 5. A field interpolation method determinationdevice (6,8 a) according to claim 1, further comprising counter means(92) increments by one count if the fields are determined to have beeneither 2-2 or 2-3 pulldown-converted, resets a count value (CDs) if theyare determined to have been neither 2-2 nor 2-3 pulldown-converted, ormaintains the count value if otherwise wherein the interpolation methoddetermination means (93) selects the inter-field interpolation if thecount value (CDs) is greater than a predetermined value, or selects theintra-field interpolation if the count value (CDs) is less than or equalto the predetermined value.
 6. A field interpolation methoddetermination device (6,8 a) according to claim 1, wherein if the inputinterlaced signal (Vin) is a 2-3 pulldown-converted, N is equal to ormore than
 6. 7. A field interpolation method determination device (6,8a) according to claim 1, wherein if the input interlaced signal (Vin) isa 2-2 pulldown-converted, N is equal to or more than
 5. 8. A fieldinterpolation method determination device (6,8 a) according to claim 1,wherein if at least two sequential signals among the N-1 inter-fieldcorrelation determination signals (R1,R2,R3,R4) indicate absence ofcorrelation, the field/frame correlation determination means (89,90)determines that the input interlaced signal have been neither 2-2 nor2-3 pulldown-converted.
 9. A field interpolation method determinationdevice (6,8 a) according to claim 1, wherein if the N-1 inter-fieldcorrelation determination signals (R1,R2,R3,R4) alternately indicatepresence and absence of correlation, the field/frame correlationdetermination means (89,90) determines that the input interlaced signalhave been either 2-2 or 2-3 pulldown-converted.
 10. A fieldinterpolation method determination device (6,8 a) according to claim 1,wherein the field correlation detection means (6,81,82,83,84) includes:pixel difference determination means (82) for determining for each pixelwhether the pixel signal level difference (SpA) is greater than a firstthreshold (X) which indicates a predetermined pixel level and outputtinga pixel unit level difference determination result (Dp) represented by abinary value; field unit level difference determination means (83) foradding one field to the pixel unit level difference determination result(Dp), and outputting a field unit level difference determination result(CDp); and inter-field correlation determination means (84) fordetermining whether inter-field correlation is significant based onwhether the field unit level difference determination result (CDp) isgreater than a second threshold (Y) indicating a predetermined number ofpixels.
 11. A field interpolation method determination device (6,8 a)according to claim 10, wherein the inter-field difference determinationmeans (6,81,82,83,84) further includes: signal level detection means (94b) for detecting a signal level (PL) indicating brightness of an imagerepresented by the 1-field delay input interlaced signal (Vd1); andfirst threshold change means (95 b) for changing the first threshold(Xb) based on a value of the signal level (PL).
 12. A fieldinterpolation method determination device (6,8 a) according to claim 10,wherein the inter-field difference determination means (6,81,82,83,84)further includes: signal level detection means (94 b) for detecting asignal level (PL) indicating brightness of an image represented by the1-field delay input interlaced signal (Vd1); and second threshold changemeans for changing the second threshold (Y) based on a value of thesignal level (PL).
 13. A field interpolation method determination device(6,8 c,10) according to claim 1, wherein the inter-field differencedetermination means (6,81,82,83,84) further includes: fieldidentification means (10) for outputting, based on the 1-field delayinput interlaced signal (Vd1), a field identification signal (Doe) whichindicates whether a field of the 1-field delay input interlaced signal(Vd1) is an even field or an odd field; and an AND circuit (96 c) forcalculating a logical product (Dfa) of the field identification signal(Doe) and the inter-field correlation determination signal (Df), andoutputting the product to the inter-field difference storage means(85-88).
 14. A field interpolation method determination device (6,8c,10,22 d,24 d) according to claim 13, wherein the inter-fielddifference determination means (6,81,82,83,84) further includes: aninverter (22 d) for outputting a reversed signal (nDoe) of the fieldidentification signal (Doe); and a field identification signal reverseswitch (24 d) for selectively outputting either the field identificationsignal (Doe) or the reversed signal (nDoe) to the AND circuit (96 c).